International Journal of Circuits, Systems and Signal Processing

   
E-ISSN: 1998-4464
Volume 15, 2021

Notice: As of 2014 and for the forthcoming years, the publication frequency/periodicity of NAUN Journals is adapted to the 'continuously updated' model. What this means is that instead of being separated into issues, new papers will be added on a continuous basis, allowing a more regular flow and shorter publication times. The papers will appear in reverse order, therefore the most recent one will be on top.

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Volume 15, 2021

Title of the Paper: Capacitor-less Low-Dropout Regulator for Analog Sensing using 90nm Technology

Authors: Pavan M. S., M. Nagabushanam, Sushmita Hawaldar, S. L. Gangadharaiah

Pages: 1184-1196 

DOI: 10.46300/9106.2021.15.129     XML

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Abstract: The capacitor-less-output-low-dropout (CLO-LDO) regulator proposed in this study can manage a wide variety of load currents. To offer temperature independent controlled LDO output, the LDO's 0.844V reference voltage is obtained using BGR, the optimized design is presented that provide full range stability, fast transient response. These benefits allow the proposed LDO regulator to operate over a wide range of operating circumstances, with very high current efficiency 99.99% and low voltage drop 100mV, operating using very low quiescent current of 0.02µA, at the output of regulator. The proposed regulator design is constructed in 90nm CMOS technology, the structure of the regulator is implemented using a Two-stage operational amplifier to obtain large DC gain 50dB to improve supply noise rejection, and a feedback loop, and exhibits better performance in terms of large phase margin 64.516 degrees with no load and 70.63degree full load.